This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2001-296102, filed on Sep. 27, 2001; the entire contents of which are incorporated herein by reference.
This invention relates to a phase-change nonvolatile storage device and its drive circuit, and more particularly to a phase-change nonvolatile storage device for storing and reproducing information by making use of resistance changes of a phase-change material contained in memory cells, and a drive circuit therefor.
Storage devices (memory) are used not only in computer systems but also in any devices and machines such as control systems of social infrastructures including electricity, gas, water, transport and communication services, and it is no exaggeration to say that the modern society does not work without storage devices. Ideal form of storage devices is to fully satisfy a high speed, low bit cost, nonvolatility, low power consumption and high reliability. With no such devices, however, it is the present status to set up a hierarchical memory structure optimum as a system.
Let a hierarchical memory structure of a personal computer be taken as an example. This hierarchical structure is set up with, in the order from the top-level memory: SRAM (static random access memory) for direct dialog with MPU (microprocessing unit), which has an ultra-high speed but has a very high bit unit price; DRAM (dynamic random access memory) that is not so speedy but has a relatively large capacity as solid memory and a lower bit unit price than SRAM; HDD (hard disk drive) that has an access speed lower by as much as several digits than DRAM but sufficiently high as mechanical access speed, large in capacity, low in bit unit price, but not being removable; and optical disk, floppy disk or magnetic tape that is lower in speed than HDD but very low in bit unit price and excellent in medium commutability and reliability.
Thus the current effort with storage devices is to optimize the capability as a system and its price by building such memory hierarchies. However, if an ideal storage device such as almighty memory (universal memory) combining the speed of DRAM and the capacity and nonvolatility of HDD appears, the system design will be greatly simplified, and it will be possible to realize a system having dramatically high capability and inexpensive.
Even when turning the eyes to individual storage devices from such almighty memory, there is the specific issue that DRAMs having led the electronic industry under the nickname xe2x80x9cindustrial ricexe2x80x9d are close to the limit in the movement toward larger capacity. For example, the limit of DRAM and substitutional candidates of storage devices are explained in Nikkei Electronics No. 2001-2-12.
The limit of DRAM is a relative increase of the occupation area of the capacity caused by the continuous increase of the capacity, i.e. continuous miniaturization of memory cells, and it has become difficult to obtain a predetermined capacity (30 fF) with trench structures or stack structures. Candidates of storage devices substitutional for DRAM are three kinds of devices, namely, FeRAM (ferroelectric random access memory), MRAM (magnetoresistive random access memory) and PRAM (phase-change random access memory).
FeRAM stores and holds information by using residual polarization of a ferroelectric material, and its signal quantity is proportional to the quantity of the stored electric charge. Since the quantity of the stored electric charge is proportional to the area of the memory cell, structure of the ferroelectric storage portion of FeRAM is fated to become complicated in the three-dimensional configuration similarly to DRAM along with miniaturization of the memory cells.
MRAM makes use of a magnetoresistance effect. TMR (tunneling magnetoresistance effect) element and CPPGMR (current perpendicular to plane giant magnetoresistance effect) element, exhibiting a relatively large resistance change, are mainly subject to researches. An issue of MRAM is that miniaturization of the element results in an increase of the diamagnetism upon flux reversal and hence an increase of the recording current. Further, although the ratio of its resistance change is relatively large, it is only about 50%.
PRAM is the element that embodiments of the invention intend to handle. This is an element for recording information by using changes of the specific resistance of a phase-change material. Its principle has its origin in the disclosure of U.S. Pat. No. 3,271,591 of 1966 and the disclosure of U.S. Pat. No. 3,530,441, and it is often called Ovonic-memory named after the proponent, Dr. Ovshinsky. The entire contents of these references are incorporated herein by reference.
The principle of its operations is briefly explained below.
If a phase-change material contained in a recording cell is once melted by supplying a recording current of a level forming the amorphous phase to the memory cell, and thereafter quenched to carry over the amorphous state to the room temperature, then the amorphous state can be obtained. On the other hand, when such a phase-change material is annealed by supplying a recording current of a level forming the crystal state, then the phase-change material is crystallized, and the crystal state is obtained. In this manner, one of the amorphous state and the crystal state can be written in each cell.
Reproduction is carried out by supplying a cell with a current smaller than the amorphism-forming level and smaller than the crystallizing level and reading the difference in resistance between the amorphous state and the crystal state as a voltage change or current change. Since some kinds of phase-change materials have differences as large as two to three digits in specific resistance between the amorphous state and the crystal state. Therefore, the quality of reproduction signals therefrom is very high, and it is also possible to technically develop it for many-valued storage.
Structure of a PRAM cell is basically made up of an electrode and a phase-change material, and a diode or a transistor for selecting the cell is connected in series to each cell to form a matrix array. Here is no such problem that the storage portion becomes relatively bulky due to a progress of the cell miniaturization, which is inherent to DRAM and FeRAM. Also the problem of MRAM that miniaturization makes recording difficult does not exist. The phase-change storage portion of PRAM becomes smaller according to the scaling rule along with miniaturization of cells, and the recording current decreases in accordance with the miniaturization.
As such, PRAM has the excellent potential as a substitute for DRAM. Additionally, because of its availability for many-valued recording, it is positioned as a hopeful candidate of the xe2x80x9cuniversal memoryxe2x80x9d mentioned above. Since the resistance change of PRAM reaches hundreds to thousands times, if 50% resistance changes obtained by MRAM are assigned to two signal levels, it is possible to store information of two hundreds to two thousands values in a single phase-change memory cell. Therefore, With a 1 Gb matrix for two-valued operation, storage of information substantially from 200 Gb to 2Tb will be possible. As such, PRAM must be just a hopeful candidate of universal memory having both the high speed of DRAM and the large capacity of HDD.
Regarding PRAM, improved techniques are disclosed by, in addition to the aforementioned literature, U.S. Pat. No. 5,341,328, U.S. Pat. No. 5,359,205, U.S. Pat. No. 5,534,711, U.S. Pat. No. 5,534,712, U.S. Pat. No. 5,596,522, U.S. Pat. No. 5,687,112 and U.S. Pat. No. 6,087,674, for example. The entire contents of these references are incorporated herein by reference.
The Inventor, however, made a review on operations of storage devices using phase-change materials, and found a basic problem. Then, through examination of operations of memory cells experimentally prepared on the basis of that knowledge, the Inventor confirmed that the problem the Inventor of the present invention et al. had found was essential, and through further development of new techniques for solving the basic problem, has reached the present invention.
According to an embodiment of the invention, there is provided a drive circuit which drives a phase-change nonvolatile storage device which has a storage cell including a phase-change material variable in phase between a crystal state and an amorphous state, and changes at least a part of said phase-change material of said storage cell in phase between said crystal state and said amorphous state to record information as a first record state corresponding to said crystal state or a second record state corresponding to said amorphous state, said drive circuit comprising: a signal generator which generates a first record signal which changes said storage cell from said first record state to said second record state, and a second record signal which changes said storage cell from said second record state to said first record state; and a reading circuit which reads the record state of said storage cell before recording information in said storage cell, said drive circuit applying said first record signal to said storage cell when said storage cell is in said first record state and should be changed to said second record state, and said drive circuit applying said second record signal to said storage cell when said storage cell is in said second record state and should be changed to said first record state.
With this configuration, an optimum recording signal can be given in accordance with the pre-recording state of the cell, and write in the overwrite mode can be reliably, easily realized.
According to another embodiment of the invention, there is provided a phase-change nonvolatile storage device comprising: a storage cell including a phase-change material variable in phase between a crystal state and an amorphous state, and changes at least a part of said phase-change material of said storage cell in phase between said crystal state and said amorphous state to record information as a first record state corresponding to said crystal state or a second record state corresponding to said amorphous state; and a drive circuit which drives said storage cell, said drive circuit having: a signal generator which generates a first record signal which changes said storage cell from said first record state to said second record state, and a second record signal which changes said storage cell from said second record state to said first record state; and a reading circuit which reads the record state of said storage cell before recording information in said storage cell, said drive circuit applying said first record signal to said storage cell when said storage cell is in said first record state and should be changed to said second record state, and said drive circuit applying said second record signal to said storage cell when said storage cell is in said second record state and should be changed to said first record state.
The xe2x80x9ccrystallization-holding timexe2x80x9d herein means the duration of time for which the phase-change material of the memory cell is held in the crystallizing temperature region between its crystallization temperature Tx and the melting point Tm.
The xe2x80x9ccrystallization start timexe2x80x9d herein means a material parameter of the phase-change material. In case of a nucleation-dominant phase-change material such as GeSb having the composition near the tie line between two metal compound compositions GeTe and Sb2Te3 on the phase diagram, the crystallization start time xcfx84xs is the time where the phase-change material is held in a temperature range not lower than Tx and lower than Tm and generation of crystal nuclei begins. In case of a crystal-growth-dominant phase-change material such as GeSbTe, InSbTe or AgInSbTe, for example, containing a material close to the Sb70Te30 eutectic composition as its major component and additionally containing germanium (Ge), indium (In) or silver (Ag), for example, the crystallization start time xcfx84xs is the time where the phase-change material is held in a temperature range not lower than Tx and lower than Tm and crystal growth begins from minute crystal nuclei.
The xe2x80x9ccrystallization finish timexe2x80x9d herein means the duration of time required for progress of generation of crystal nuclei and coalescence of crystal nuclei until filling a predetermined portion each cell with crystal grains or for progress of crystal growth until crystallizing a predetermined portion.